This blog is about VLSI design using Open-Source EDA Tools, including SystemC, iVerilog, Yosys, Auto-P&R, NetGen and Magic. If you're about to begin IC design, Start here; "My Chip MPW Service": Special Course on Semiconductor Design Using Open-Source Tools The pages are written in Korean. Foreign visitors can read through Google's translation service.
"My Chip MPW Service": Special Course on Semiconductor Design Using Open-Source Tools
오픈-소스 EDA 도구 활용 NSPL 0.5um CMOS 공정 표준-셀 디자인 킷
Open-Source Std-Cell based Design Kit for NSPL/ETRI 0.5um CMOS process(2-Poly/3-Metal)
Github repo. link:https://github.com/GoodKook/ETRI-0.5um-CMOS-MPW-Std-Cell-DK.git
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