6502 RTL+SystemC Interactive Co-Simulation
Here's another example of interactive co-simulation environment. I made this Co-Sim environment as an example to teach college students "What can do with SystemC. It is C++, Not just another HDL." at Kyunghee University, Korea.
1. RTL Simulator: QuestaSim Starter FPGA Edition (intel)
2. C++ Compiler: VisualStudio 2022 Community Edition
3. 6502 RTL: https://github.com/Arlet/verilog-6502
4. Monitor: Woz monitor & Basic, http://retro.hansotten.nl/6502-sbc/apple-1/
5. SystemC/C++: I made followings,
- Memory model
- Peripheral model (Screen & Keyboard)
- Windows' Pipe IPC(inter-process communication) is used for interaction between RTL simulator and Terminal.
See following moving GIF:
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